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1 lt1185 1185ff low dropout regulator low resistance pass transistor: 0.25 ? dropout voltage: 0.75v at 3a 1% reference voltage accurate programmable current limit shutdown capability internal reference available full remote sense low quiescent current: 2.5ma good high frequency ripple rejection available in 5-lead to-220 and dd packages the lt1185 uses a saturation-limited npn transistor asthe pass element. this device gives the linear dropout characteristics of a fet pass element with significantly less die area. high efficiency is maintained by using special anti-saturation circuitry that adjusts base drive to track load current. the ?n resistance?is typically 0.25 ? . accurate current limit is programmed with a single 1/8wexternal resistor, with a range of zero to three amperes. a second, fixed internal limit circuit prevents destructive currents if the programming current is accidentally over- ranged. shutdown of the regulator output is guaranteed when the program current is less than 1 a, allowing external logic control of output voltage. the lt1185 has all the protection features of previousltc regulators, including power limiting and thermal shutdown. 5v, 3a regulator with 3.5a current limit dropout voltage + 2.37k2.67k 2 f tant ref gnd fb v out v in lt1185 2 f tant r lim * 4.3k + v in 6v to 16v v out 5v at 3a lt1185 ?ta01 *current limit = 15k/r lim = 3.5a + + load current (a) 0 v in ?v out (v) 0.8 1.0 1.2 4 lt1185 ? ta02 0.6 0.4 0 1 2 3 0.2 1.6 1.4 t j = 125 c t j = 55 c t j = 25 c the lt 1185 is a 3a low dropout regulator with adjustable current limit and remote sense capability. it can be used asa positive output regulator with floating input or as a standard negative regulator with grounded input. the output voltage range is 2.5v to 25v, with 1% accuracy on the internal reference voltage. features descriptio u typical applicatio u , lt, ltc and ltm are registered trademarks of linear technology corporation.all other trademarks are the property of their respective owners. downloaded from: http:///
2 lt1185 1185ff order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbflead free part marking: http://www.linear.com/leadfree/ 2 4 1 3 gnd fb ref v in (case) v out k package 4-lead to-3 metal can bottom view order part number lt1185mk order part number lt1185ctlt1185it jc max = 2.5 c/ w, ja = 50 c/w t package 5-lead plastic to-220 refv out v in fbgnd front view tab is v in 54 3 2 1 jc max = 2.5 c/ w, ja = 35 c/w *see application section for details on calculating operation junction temperature absolute axi u rati gs w ww u package/order i for atio uu w (note 1) obsolete package order part number lt1185cq lt1185iq t jmax = 150 c, ja = 30 c/w q package 5-lead plastic dd front view tab is v in refv out v in fbgnd 54 3 2 1 parameter conditions min typ max units reference voltage (at fb pin) 2.37 v reference voltage tolerance (at fb pin) (note 2) v in ?v out = 5v, v out = v ref 0.3 1% 1ma i out 3a 1 2.5 % v in ?v out = 1.2v to v in = 30v p 25w (note 6), v out = 5v t min t j t max (note 9) feedback pin bias current v out = v ref 0.7 2 a droput voltage (note 3) i out = 0.5a, v out = 5v 0.20 0.37 v i out = 3a, v out = 5v 0.67 1.00 v the denotes specifications which apply over the operating temperature range, otherwise specifications are at t a = 25 c. adjustable version, v in = 7.4v, v out = 5v, i out = 1ma, r lim = 4.02k, unless otherwise noted. electrical characteristics consult ltc marketing for parts specified with wider operating temperature ranges. input voltage .......................................................... 35v input-output differential ......................................... 30v fb voltage ................................................................ 7v ref voltage .............................................................. 7v output voltage ........................................................ 30v output reverse voltage ............................................ 2v operating ambient temperature range lt1185c ............................................... 0 c to 70 c lt1185i ............................................. 40 c to 85 c lt1185m (obsolete) .................... 55 c to 125 c operating junction temperature range*control section lt1185c ............................................. 0 c to 125 c lt1185i .......................................... 40 c to 125 c lt1185m (obsolete) ................... 55 c to 150 c power transistor section lt1185c ............................................. 0 c to 150 c lt1185i .......................................... 40 c to 150 c lt1185m (obsolete) ................... 55 c to 175 c storage temperature range ................ 65 c to 150 c lead temperature (soldering, 10 sec)................ 300 c downloaded from: http:///
3 lt1185 1185ff the denotes specifications which apply over the operating temperature range, otherwise specifications are at t a = 25 c. adjustable version, v in = 7.4v, v out = 5v, i out = 1ma, r lim = 4.02k, unless otherwise noted. parameter conditions min typ max units load regulation (note 7) i out = 5ma to 3a 0.05 0.3 % v in ?v out = 1.5v to 10v, v out = 5v line regulation (note 7) v in ?v out = 1v to 20v, v out = 5v 0.002 0.01 %/v minimum input voltage i out = 1a (note 4), v out = v ref 4.0 v i out = 3a 4.3 v internal current limit (see graph for 1.5v v in ?v out 10v 3.3 3.6 4.2 a guaranteed curve) (note 12) 3.1 4.4 a v in ?v out = 15v 2.0 3.0 4.2 a v in ?v out = 20v 1.0 1.7 2.6 a v in ?v out = 30v 0.2 0.4 1.0 a external current limit 5k r lim 15k, v out = 1v 15k a ? programming constant (note 11) external current limit error 1a i lim 3a 0.02 i lim 0.06 i lim + 0.03 a r lim = 15k ?a/i lim 0.04 i lim 0.09 i lim + 0.05 a quiescent supply current i out = 5ma, v out = v ref 2.5 3.5 ma 4v v in 25v (note 5) supply current change with load v in ?v out = v sat (note 10) 25 40 ma/a v in ?v out 2v 10 25 ma/a ref pin shutoff current 0.4 2 7 a thermal regulation (see applications v in ?v out = 10v 0.005 0.014 %/w information) i out = 5ma to 2a reference voltage temperature coefficient (note 8) 0.003 0.01 %/ c thermal resistance junction to case to-3 control area 1 c/w power transistor 3 c/w to-220 control area 1 c/w power transistor 3 c/w note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolutemaximum rating condition for extended periods may affect device reliability and lifetime. note 2: reference voltage is guaranteed both at nominal conditions (no load, 25 c) and at worst-case conditions of load, line, power and temperature. an intermediate value can be calculated by adding the effectsof these variables in the actual application. see the applications information section of this data sheet. note 3: dropout voltage is tested by reducing input voltage until the output drops 1% below its nominal value. tests are done at 0.5a and 3a.the power transistor looks basically like a pure resistance in this range so that minimum differential at any intermediate current can be calculated by interpolation; v dropout = 0.25v + 0.25 ? ?i out . for load current less than 0.5a, see graph.note 4: ?inimum input voltage?is limited by base emitter voltage drive of the power transistor section, not saturation as measured in note 3. foroutput voltages below 4v, ?inimum input voltage?specification may limit dropout voltage before transistor saturation limitation. note 5: supply current is measured on the ground pin, and does not include load current, r lim , or output divider current. note 6: the 25w power level is guaranteed for an input-output voltage of 8.3v to 17v. at lower voltages the 3a limit applies, and at higher voltagesthe internal power limiting may restrict regulator power below 25w. see graphs. note 7: line and load regulation are measured on a pulse basis with a pulse width of 2ms, to minimize heating. dc regulation will be affected by thermal regulation and temperature coefficient of the reference. seeapplications information section for details. note 8: guaranteed by design and correlation to other tests, but not tested.note 9: t jmin = 0 c for the lt1185c, 40 c for lt1185i, and ?5 c for the lt1185m. power transistor area and control circuit area have differentmaximum junction temperatures. control area limits are t jmax = 125 c for the lt1185c and lt1185i and 150 c for the lt1185m. power area limits are 150 c for lt1185c and lt1185i and 175 c for lt1185m. note 10: v sat is the maximum specified dropout voltage; 0.25v + 0.25 ?i out . note 11: current limit is programmed with a resistor from ref pin to gnd pin. the value is 15k/i lim . note 12: for v in ?v out = 1.5v; v in = 5v, v out = 3.5v. v out = 1v for all other current limit tests. electrical characteristics downloaded from: http:///
4 lt1185 1185ff ripple rejection vs frequency ground pin current input-output differential (v) 0 0 output currnt (a) 1 2 3 5 10 15 20 lt1185 ?tpc01 25 4 5 30 typical test points guaranteed limit guaranteedlimit internal current limit input voltage (v) 0 ground pin current (ma) 8 10 12 15 25 lt1185 ? tpc02 6 4 510 20 30 35 2 0 v out = 5v *does not include ref current or output divider current i load = 0 t j = 25 c quiescent ground pin current* junction temperature ( c) ?0 voltage (v) 2.37 2.38 2.39 150 lt1185 ? tpc03 2.362.35 2.33 0 50 100 2.34 2.412.40 ?5 25 75 125 feedback pin voltagetemperature drift load current (a) 0 current (ma) 80 100 120 4 lt1185 ? tpc04 6040 0 1 2 3 20 160140 t j = 25 c regulator just at dropout point v in ?v out = 5v frequency (hz) ?0 ratio v out /v in (db) ?0 ?0 ?0 100 100 10k 100k 1m lt1185 ?tpc05 0 1k all output voltages with 0.05 f across r2 v out = 5v v in ?v out = 1.5v load transient response time ( s) 0 4 8 10 lt1185 ?tpc06 26 12 14 16 0.1a t r , f 100ns c out = 2.2 f, esr = 1 ? c out = 2.2 f, esr = 2 ? v out = 5v i out = 1a 100mv ? i load output impedance frequency (hz) 0.01 impedance ( ? ) 0.1 1 10 1m 10k 100k lt1183 ? tpc07 0.001 1k output impedance is set by output capacitor esr in this region v out = 5v i out = 1a c out = 2.2 f typical perfor a ce characteristics uw downloaded from: http:///
5 lt1185 1185ff block diagrama simplified block diagram of the lt1185 is shown in figure 1. a 2.37v bandgap reference is used to bias the input of the error amplifier a1, and the reference amplifier a2. a1 feeds a triple npn pass transistor stage which has the two driver collectors tied to ground so that the main pass transistor can completely saturate. this topology normally has a problem with unlimited current in q1 and q2 when the input voltage is less than the minimum required to create a regulated output. the standard ?ix for this problem is to insert a resistor in series with q1 and q2 collectors, but this resistor must be low enough in value to supply full base current for q3 under worst-case figure 1. block diagram 300mv i12 a r1350 ? 200mv d2 d4 d3 + a5 + a4 + a3 v in r20.055 ? + a1 + a2 v ref 2.37v v out fb gnd r lim (external) ref d1 lt1185 ?bd q1 q2 q3 q4 conditions, resulting in very high supply current when theinput voltage is low. to avoid this situation, the lt1185 uses an auxiliary emitter on q3 to create a drive limiting feedback loop which automatically adjusts the drive to q1 so that the base drive to q3 is just enough to saturate q3, but no more. under saturation conditions, the auxiliary emitter is acting like a collector to shunt away the output current of a1. when the input voltage is high enough to keep q3 out of saturation, the auxiliary emitter current drops to zero even when q3 is conducting full load current. applicatio s i for atio wu uu downloaded from: http:///
6 lt1185 1185ff amplifier a2 is used to generate an internal current throughq4 when an external resistor is connected from the ref pin to ground. this current is equal to 2.37v divided by r lim . it generates a current limit sense voltage across r1. the regulator will current limit via a4 when the voltageacross r2 is equal to the voltage across r1. these two resistors essentially form a current ?mplifier?with a gain of 350/0.055 = 6,360. good temperature drift is inherent because r1 and r2 are made from the same diffusions. their ratio, not absolute value, determines current limit. initial accuracy is enhanced by trimming r1 slightly at wafer level. current limit is equal to 15k ? /r lim . d1 and i 1 are used to guarantee regulator shutdown when ref pin current drops below 2 a. a current less than 2 a through q4 causes the +input of a5 to go low and shut down the regulator via d2. a3 is an internal current limit amplifier which can override the external current limit. it provides ?oof proof?protec- tion for the pass transistor. although not shown, a3 has a nonlinear foldback characteristic at input-output volt- ages above 12v to guarantee safe area protection for q3. see the graph, internal current limit in the typical perfor- mance characteristics of this data sheet. setting output voltage the lt1185 output voltage is set by two external resistors (see figure 2). internal reference voltage is trimmed to 2.37v so that a standard 1% 2.37k resistor (r1) can be used to set divider current at 1ma. r2 is then selected from: for r1 = 2.37k and v ref = 2.37v, this reduces to: r2 = v out ?2.37k suggested values of 1% resistors are shown. v out r2 when r1 = 2.37k 5v 2.67k 5.2v 2.87k 6v 3.65k 12v 9.76k 15v 12.7k output capacitor the lt1185 has a collector output npn pass transistor,which makes the open-loop output impedance much higher than an emitter follower. open-loop gain is a direct function of load impedance, and causes a main-loop ?ole?to be created by the output capacitor, in addition to an internal pole in the error amplifier. to ensure loop stability, the output capacitor must have an esr (effective series resistance) which has an upper limit of 2 ? , and a lower limit of 0.2 divided by the capacitance in f. a 2 f output capacitor, for instance, should have a maximumesr of 2 ? , and a minimum of 0.2/2 = 0.1 ? . these values are easily encompassed by standard solid tantalumcapacitors, but occasionally a solid tantalum unit will have abnormally high esr, especially at very low tempera- tures. the suggested 2 f value shown in the circuit applications should be increased to 4.7 f for 40 c and ?5 c designs if the 2 f units cannot be guaranteed to stay below 2 ? at these temperatures. although solid tantalum capacitors are suggested, othertypes can be used if they meet the esr requirements. standard aluminum electrolytic capacitors need to be upward of 25 f in general to hold 2 ? maximum esr, especially at low temperatures. ceramic, plastic film, andmonolithic capacitors have a problem with esr being too low . these types should have a 1 ? carbon resistor in series to guarantee loop stability.the output capacitor should be located close to the regu- lator ( 3") to avoid excessive impedance due to lead inductance. a six inch lead length (2 ?3") will generate anextra 0.8 ? inductive reactance at 1mhz, and unity-gain frequency can be up to that value.for remote sense applications, the capacitor should still be located close to the regulator. additional capacitance can be added at the remote sense point, but the remote capacitor must be at least 2 f solid tantalum. it cannot be a low esr type like ceramic or mylar unless a 0.5 ? to 1 ? carbon resistor is added in series with the capacitor. logicboards with multiple low esr bypass capacitors should have a solid tantalum unit added in parallel whose value is approximately five times the combined value of low esr capacitors. r2 = (v out ?2.37) r1 v ref applicatio s i for atio wu uu downloaded from: http:///
7 lt1185 1185ff large output capacitors (electrolytic or solid tantalum)will not cause the lt1185 to oscillate, but they will cause a damped ?inging?at light load currents where the esr of the capacitor is several orders of magnitude lower than the load resistance. this ringing only occurs as a result of transient load or line conditions and normally causes no problems because of its low amplitude ( 25mv). heat sinkingthe lt1185 will normally be used with a heat sink. the size of the heat sink is determined by load current, input and output voltage, ambient temperature, and the thermal resistance of the regulator, junction-to-case ( jc ). the lt1185 has two separate values for jc : one for the power transistor section, and a second, lower value for thecontrol section. the reason for two values is that the power transistor is capable of operating at higher continu- ous temperature than the control circuitry. at low power levels, the two areas are at nearly the same temperature, and maximum temperature is limited by the control area. at high power levels, the power transistor will be at asignificantly higher temperature than the control area and its maximum operating temperature will be the limiting factor. to calculate heat sink requirements, you must solve athermal resistance formula twice, one for the power transistor and one for the control area. the lowest value obtained for heat sink thermal resistance must be used. inthese equations, two values for maximum junction tem- perature and junction-to-case thermal resistance are used, as given in electrical specifications. example: a commercial version of the lt1185 in the to-220 package is to be used with a maximum ambienttemperature of 60 c. output voltage is 5v at 2a. input voltage can vary from 6v to 10v. assume an interfaceresistance of 1 c/w. first solve for control area, where the maximum junctiontemperature is 125 c for the to-220 package, and jc = 1 c/w: next, solve for power transistor limitation, witht jmax = 150 c, jc = 3 c/w: the lowest number must be used, so heat sink resistancemust be less than 4.2 c/w. some heat sink data sheets show graphs of heat sinktemperature rise vs power dissipation instead of listing a value for thermal resistance. the formula for hs can be rearranged to solve for maximum heat sink temperaturerise: ? t hs = t jmax ?t amax ?p( jc + chs ) using numbers from the previous example: ? t hs = 125 c ?60 ?10.5(1 + 1) = 44 c control section ? t hs = 150 c ?60 ?10.5(3 + 1) = 48 c power transistor the smallest rise must be used, so heat sink temperaturerise must be less than 44 c at a power level of 10.5w. for board level applications, where heat sink size may becritical, one is often tempted to use a heat sink which barely meets the requirements. this is permissible if correct assumptions were made concerning maximumambient temperature and power levels. one complicating p = (10v ?5v) (2a) + 2a 40 (10v) = 10.5w hs = 125 c ?60 c 10.5w ?1 c/w ?1 c/w = 4.2 c/w hs = 150 ?60 10.5 ?3 ?1 = 4.6 c/w hs = (t jmax ?t amax ) p ? jc ? chs . hs = maximum heat sink thermal resistance jc = lt1185 junction-to-case thermal resistance chs = case-to-heat sink (interface) thermal resistance, including any insulating washers t jmax = lt1185 maximum operating junction temperature t amax = maximum ambient temperature in customers application p = device dissipaton = (v in ?v out ) (i out ) + i out 40 (v in ) applicatio s i for atio wu uu downloaded from: http:///
8 lt1185 1185ff factor is that local ambient temperature may be somewhathigher because of the point source of heat. the conse- quences of excess junction temperature include poor reliability, especially for plastic packages, and the possi- bility of thermal shutdown or degraded electrical charac- teristics. the final design should be checked in situ with a thermocouple attached to the regulator case under worst-case conditions of high ambient, high input voltage and full load. what about overloads? ic regulators with thermal shutdown, like the lt1185, allow heat sink designs which concentrate on worst-case ?ormal?conditions and ignore ?ault?conditions. an output overload or short may force the regulator to exceed its maximum junction temperature rating, but thermal shutdown is designed to prevent regulator failure under these conditions. a word of caution however; thermal shutdown temperatures are typically 175 c in the control portion of the die and 180 c to 225 c in the power transistor section. extended operation at these tempera-tures can cause permanent degradation of plastic encap- sulation. designs which may be subjected to extended periods of overload should either use the hermetic to-3 package or increase heat sink size. foldback current limiting can be implemented to minimize power levels under fault conditions. external current limit the lt1185 requires a resistor to set current limit. the value of this resistor is 15k divided by the desired current limit (in amps). the resistor for 2a current limit would be 15k/2a = 7.5k. tolerance over temperature is 10%, so current limit is normally set 15% above maximum loadcurrent. foldback limiting can be employed if short-circuit current must be lower than full load current (see typical applications). the lt1185 has internal current limiting which will over-ride external current limit if power in the pass transistor is excessive. the internal limit is 3.6a with a foldback characteristic which is dependent on input-output volt-age, not output voltage per se (see typical performace characteristics) . ground pin currentground pin current for the lt1185 is approximately 2ma plus i out /40. at i out = 3a, ground pin current is typically 2ma + 3/40 = 77ma. worst case guarantees on the ratio ofi out to ground pin current are contained in the electrical specifications.ground pin current can be important for two reasons. it adds to power dissipation in the regulator and it can affect load/line regulation if a long line is run from the ground pin to load ground. the additional power dissipation is found by multiplying ground pin current by input voltage. in a typical example, with v in = 8v, v out = 5v and i out = 2a, the lt1185 will dissipate (8v ?5v)(2a) = 6w in the passtransistor and (2a/40)(8v) = 0.4w in the internal drive circuitry. this is only a 1.5% efficiency loss, and a 6.7% increase in regulator power dissipation, but these values will increase at higher output voltages. ground pin current can affect regulation as shown in figure 2. parasitic resistance in the ground pin lead will create a voltage drop which increases output voltage as load current is increased. similarly, output voltage can decrease as input voltage increases because the ? out /40 component of ground pin current drops significantly athigher input-output differentials. these effects are small enough to be ignored for local regulation applications, but applicatio s i for atio wu uu figure 2. proper connection of positive sense lead + r1*2.37k r2 ref gnd fb v out v in lt1185 r lim + v in v out lt1185 ?f02 load parasitic lead resistances ? r b + i gnd r a *r1 should be connected directly to ground lead, not to the load, so that r a 0 ? . this limits the output voltage error to (i gnd )(r b ). errors created by r a are multiplied by (1 + r2/r1). note that v out increases with increasing ground pin current. r2 should be connected directly to load for remote sensing downloaded from: http:///
9 lt1185 1185ff applicatio s i for atio wu uu figure 3. shutdown techniques r lim ? 4k + v in r630k r72.4k ? r1 r2 v out + q12n3906 * lt1185 ?f3a *cmos logic ? for higher values of r lim , make r7 = (r lim )(0.6) 5v r5300k + ref gnd fb v out v in lt1185 5v logic, positive regulated output 5v logic, negative regulated output r lim lt1185 ?f03b ref gnd fb v out lt1185 v in r433k 5v ?i?= output ?ff3 ea 1n4148 v in q12n3906 for remote sense applications, they may need to be con-sidered. ground lead resistance of 0.4 ? would cause an output voltage error of up to (3a/40)(0.4 ? ) = 30mv, or 0.6% at v out = 5v. note that if the sense leads are connected as shown in figure 2, with r a 0 ? , this error is a fixed number of millivolts, and does not increase as afunction of dc output voltage. shutdown techniques the lt1185 can be shut down by open-circuiting the ref pin. the current flowing into this pin must be less than 0.4 a to guarantee shutdown. figure 3 details several ways to create the ?pen?condition, with various logiclevels. for variations on these schemes, simply remember that the voltage on the ref pin is 2.4v negative with respect to the ground pin. output overshoot very high input voltage slew rate during start-up may cause the lt1185 output to overshoot. up to 20% over- shoot could occur with input voltage ramp-up rate exceed- ing 1v/ s. this condition cannot occur with normal 50hz to 400hz rectified ac inputs because parasitic resistanceand inductance will limit rate of rise even if the power switch is closed at the peak of the ac line voltage. this assumes that the switch is in the ac portion of the circuit. if instead, a switch is placed directly in the regulator input so that a large filter capacitor is precharged, fast input slew rates will occur on switch closure. the output of the regulator will slew at a rate set by current limit and output capacitor size; dvdt = i lim /c out . with i lim = 3.6a and c out = 2.2 f, the output will slew at 1.6v/ s and overshoot can occur. this overshoot can be reduced to a few hundredmillivolts or less by increasing the output capacitor to 10 f and/or reducing current limit so that output slew rate is held below 0.5v/ s. a second possibility for creating output overshoot isrecovery from an output short. again, the output slews at a rate set by current limit and output capacitance. to avoid overshoot, the ratio i lim /c out should be less than 0.5 10 6 . remember that load capacitance can be added to c out for this calculation. many loads will have multiple supply bypass capacitors that total more than c out . downloaded from: http:///
10 lt1185 1185ff thermal regulationic regulators have a regulation term not found in discrete designs because the power transistor is thermally coupled to the reference. this creates a shift in the output voltage which is proportional to power dissipation in the regulator. ? v out = p(k1 + k2 ja ) = (i out )(v in ?v out )(k1 + k2 ja ) k1 and k2 are constants. k1 is a fast time constant effectcaused by die temperature gradients which are estab- lished within 50ms of a power change. k1 is specified onthe data sheet as thermal regulation, in percent per watt. k2 is a long time constant term caused by the temperature drift of the regulator reference voltage. it is also specified, but in percent per degree centigrade. it must be multiplied by overall thermal resistance, junction-to-ambient, ja . as an example, assume a 5v regulator with an inputvoltage of 8v, load current of 2a, and a total thermal resistance of 4 c/w, including junction-to-case, (use control area specification), interface, and heat sink resis-tance. k1 and k2, respectively, from the data sheet are 0.014%/w and 0.01%/ c. ? v out = (2a)(8v 5v)(0.014 + 0.01 ?4) = 0.32% this shift in output voltage could be in either directionbecause k1 and k2 can be either positive or negative. thermal regulation is already included in the worst case reference specification. output voltage reversal some ic regulators suffer from a latch-up state when their output is forced to a reverse voltage of as little as one diode drop. the latch-up state can be triggered without a fault condition when the load is connected to an opposite polarity supply instead of to ground. if the second supply is turned on first, it will pull the output of the first supply to a reverse voltage through the load. the first supply may then latch off when turned on. this problem is particularly annoying because the diode clamps which should always be used to protect against polarity reversal do not usually stop the latch-up problem. the lt1185 is designed to allow output reverse polarity of several volts without damage or latch-up, so that a simple diode clamp can be used. applicatio s i for atio wu uu downloaded from: http:///
11 lt1185 1185ff foldback current limiting lt1185 ?ta03a v in r45.36k r315k q1 2n3906 r12.37k + 2 f tant ref gnd fb v out lt1185 v in + v out 2 f tant r22.61k + + auxiliary + 12v low dropout regulator for switching supply i out v out (normalized) 0.6 0.8 1.0 lt1185 ?ta03b 0.40.2 0 1.2 1.4 1.6 i short-circuit = 15k r3 + i full load = 15k r3 10.8k r4 lt1185 ?ta04 r lim r12.37k r29.76k 12vregulated auxiliary 5vmain output * * 5v control primary *diode connection indicates a flyback switching topology, but forward converters may also be used + + + ref gnd fb v out v in lt1185 typical applicatio s u downloaded from: http:///
12 lt1185 1185ff time delayed start-up low input voltage monitor tracks dropout characteristics + ref gnd fb v out lt1185 v in r lim *** d1 d2 r3**15k c3* d3 ? c22.2 f v in r2 r12.37k c12.2 f tant + v out lt1185 ?ta06 all diodes 1n4148 *see chart for delay time versus (c3)(r3//r lim ) product **for long delay times, replace d2 with 2n3906 transistor and use r3 only for calculating delay time. r3 can increase to 100k ***i lim is 11k/r lim , instead of 15k, because of voltage drop in d1. temperature coefficient of i lim will be 0.11%/ c, so adequate margin must be allowed for cold operation ? d3 provides fast reset of timing. input must drop to a low value to reset timing q1** + + delay time input voltage (v) 0 time constants (t)* 1.5 2.0 2.5 15 25 lt1185 ?ta07 1.0 0.5 0 51 0 2 0 3.0 3.5 4.0 30 *t = (r3//r lim )(c3) = ( ) r3 ?r lim r3 + r lim (c3) typical applicatio s u r6** 1k + 4k r12.37k r22.6k r7 27k c12.2 f tant v out + optional hysteresis 2m lt1006 ? v v + 32 4 7 ?ow?for low inputoutput swings from v in + to v in r3360k r4**1k r5* 0.01 ? c22.2 f tant ref gnd fb v out lt1185 v in + v in *3" #26 wire**r4 determines trip point at i out = 0 r6 determines increase of trip point as i out increases trip point for v in = v out () 1 + r4 ?r7r3 ?r6 + i out r5 ?r7 r6 for values shown, trip point for v in is: v out + 0.37v at i out = 0 and v out = 1.18v at i out = 3a ? do not substitute. op amp must have common mode range equal to negative supply lt1185 ?ta05 + + downloaded from: http:///
13 lt1185 1185ff r15.5k c110pf r2 3k r3 3k r4 520 ? r5600 ? r7500 ? r6750 ? 500 ? r92.7k q48 r544k r86.5k q9 q15 q16 r11220 ? r5310k r52 10k c2 r55 30k r49700 ? r56600 ? r50160 ? 10k r468k q36 r474k q51 q35 r482k r451.3k r401k r42 50k r43 50k r445k c3 30pf r391k d1 r122k r132k r143.2k r17 6k r15 4k r161k r182k q17 q18 q19 q28 r35 20k c4 10pf r371k r38400 ? c5 10pf r34300 ? r3620k r3820k r280.055 ? r261k r24 6k r23 80 ? r1920k d4 v in v out fb gnd ref q52 r31 200 ? lt1185 ?sd q20 q53 q21 q22 q23 q24 q25 q26 q27 q29 q30 q31 q14 q13 q8 q12 q11 q6 q5 q2 q4 q1 q3 q49 q47 q43 q44 q41 q46 q40 q34 q39 q37 q50 q33 q32 q7 q45 q42 sche atic diagra w w downloaded from: http:///
14 lt1185 1185ff u package descriptio k package 4-lead to-3 metal can (reference ltc dwg # 05-08-1311) t package 5-lead plastic to-220 (standard) (reference ltc dwg # 05-08-1421) k4(to-3) 0801 72 18 .490 ?.510 (12.45 ?12.95) r .470 tp p.c.d. .167 ?.177 (4.24 ?4.49) r .151 ?.161 (3.84 ?4.09) dia 2 plc .655 ?.675 (16.64 ?19.05) 1.177 ?1.197 (29.90 ?30.40) .038 ?.043 (0.965 ?1.09) .060 ?.135 (1.524 ?3.429) .320 ?.350 (8.13 ?8.89) .420 ?.480 (10.67 ?12.19) .760 ?.775 (19.30 ?19.69) t5 (to-220) 0801 .028 ?.038 (0.711 ?0.965) .067 (1.70) .135 ?.165 (3.429 ?4.191) .700 ?.728 (17.78 ?18.491) .045 ?.055 (1.143 ?1.397) .095 ?.115 (2.413 ?2.921) .013 ?.023 (0.330 ?0.584) .620 (15.75) typ .155 ?.195* (3.937 ?4.953) .152 ?.202 (3.861 ?5.131) .260 ?.320 (6.60 ?8.13) .165 ?.180 (4.191 ?4.572) .147 ?.155 (3.734 ?3.937) dia .390 ?.415 (9.906 ?10.541) .330 ?.370 (8.382 ?9.398) .460 ?.500 (11.684 ?12.700) .570 ?.620 (14.478 ?15.748) .230 ?.270 (5.842 ?6.858) bsc seating plane * measured at the seating plane obsolete package downloaded from: http:///
15 lt1185 1185ff information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of circuits as described herein will not infringe on existing patent rights. u package descriptio q package 5-lead plastic dd pak (reference ltc dwg # 05-08-1461) q(dd5) 0502 .028 ?.038 (0.711 ?0.965) typ .143 +.012?020 () 3.632 +0.305 0.508 .067 (1.702) bsc .013 ?.023 (0.330 ?0.584) .095 ?.115 (2.413 ?2.921) .004 +.008?004 () 0.102 +0.203 0.102 .050 .012 (1.270 0.305) .059 (1.499) typ .045 ?.055 (1.143 ?1.397) .165 ?.180 (4.191 ?4.572) .330 ?.370 (8.382 ?9.398) .060 (1.524) typ .390 ?.415 (9.906 ?10.541) 15 typ .420 .350 .565 .090 .042 .067 recommended solder pad layout .325 .205 .080 .565 .090 recommended solder pad layout for thicker solder paste applications .042 .067 .420 .276 .320 note:1. dimensions in inch/(millimeter) 2. drawing not to scale .300 (7.620) .075 (1.905) .183 (4.648) .060 (1.524) .060 (1.524) .256 (6.502) bottom view of dd pak hatched area is solder plated copper heat sink downloaded from: http:///
16 lt1185 1185ff ? linear technology corporation 1994 lt/lwi 0906 rev f ? printed in usa logic controlled 3a low-side switch with fault protection lt1185 ?ta08 ref gnd v out lt1185 fb v in 5v load 1n4001add for inductive loads r lim 4k improved high frequency ripple rejection + v out + v in lt1185 ?ta09 r lim c22.2 f tant r12.37k r2 c30.05 f c14.7 f tant note: c3 impoves high frequency ripple rejection by 6db at v out = 5v, and by 14db at v out = 12v. c1 is increased to 4.7 f to ensure good stabiltity when c3 is used ref gnd fb v out lt1185 v in + part number description comments lt1085 7.5a low dropout regulator 1v dropout voltage lt1117 800ma low dropout regulator with shutdown reverse voltage and reverse current protection lt1120a micropower regulator with comparator and shutdown 20 a supply current, 2.5v reference output lt1129 200ma micropower low dropout regulator 400mv dropout voltage, 50 a supply current lt1175 500ma negative low dropout micropower regulator 45 a supply current, adjustable current limit lt1585 4.6a low dropout fast transient response regulator for high performance microprocessors lt1964 200ma, low noise micropower, negative ldo v in : ?.9v to ?0v, v out(min) = ?.21v, v do = 0.34v, i q = 30 a, i sd = 3 a, thinsot package related parts linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com typical applicatio s u downloaded from: http:///

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